1. Field of the Invention
This invention is related to radio frequency transmitters and specifically to transmitters of frequency modulated signals.
2. Description of Related Information
Radio frequency transmitters have traditionally used high frequency carrier signals that are modulated to superimpose information upon the signals and then transmitted to a receiver which demodulates the signal to remove the transferred information. One technique of producing such a carrier signal involves a crystal controlled oscillator whose base frequency signal output is input into a frequency multiplier network. The frequency multiplier multiplies the base frequency from the crystal oscillator circuit to produce an output frequency which is a predetermined multiple of the base frequency. One disadvantage to this technique is that filters must be used to filter out the harmonic signals and spurious signals produced by the multiplier circuits. Therefore, the transmitter circuit must include several multipliers, filters and amplifiers in series to produce the high frequency carrier signal. Each of these stages must be tuned in order to produce the desired output carrier frequency. A transmitter for producing an output carrier frequency in the order of 200 MHz may require twenty to thirty separate adjustments to properly produce the appropriate output frequency. Even then, the output frequency is fixed for a specific center frequency and to adjust the transmitter to produce a different output frequency, one must change the crystal oscillator output frequency and retune the other circuit elements.
A second technique for producing a frequency variable output transmitter involves using the same first transmitter technique and a second circuit involving a phase locked loop. The output of the first technique transmitter and the phase locked loop are combined in a mixer circuit which provides an output signal frequency that is the sum and the difference of the two input frequency signals. By placing a filter on the output of the mixer, one may select the desired frequency. The phase locked loop circuit produces an output frequency in a manner that can be varied. Specifically, the phase locked loop system includes a feedback loop component which may be adjusted to change the resulting output frequency from the phase locked loop. Therefore, by adjusting this feedback component, the resulting output from the mixer may be altered. The disadvantage to this second technique is that the mixer is a non-linear element which restricts the output frequency to a limited range. Further, the first technique transmitter circuit still requires the many adjustments previously discussed.
A third technique is to use a phase locked loop circuit by itself and modulate the phase locked loop output with the information data as an input. Specifically, the phase locked loop includes a crystal frequency oscillator to provide a reference frequency that is input to a phase detector that receives a feedback signal along with the reference frequency signal. The phase detector output is a pulse signal which is input to an integrator circuit. The output of the integrator circuit is connected to a summing node which also receives the input data. The summing node is connected to a varactor which is connected in series with a voltage controlled oscillator. The varactor operates as a voltage controlled capacitor to supply a signal voltage to the voltage controlled oscillator which outputs a frequency in accordance with the voltage input. The output of the voltage controlled oscillator is input to a buffer amplifier for transmission of the frequency output signal. The output of the voltage controlled oscillator is also input to a feedback element, normally, a divide by circuit used to divide the frequency down to a certain level for feedback to the phase detector circuit. A counter is customarily connected to the divide by circuit which specifies the number that the frequency from the voltage controlled oscillator is divided by to derive the feedback signal input to the phase detector. The feedback signal is compared to the reference frequency to close the loop and to maintain the output frequency control at a constant value. By varying the magnitude of the number in the counter, the output frequency of the circuit may be controlled and varied. One disadvantage of this technique is that this technique is not practical for input signals having a duty cycle less than 50%. Specifically, with a data input duty cycle different than 50%, the frequency output varies between an upper and lower limit with a center frequency skewed toward one of those limits. In a frequency modulated transmitter, it is desired that the center frequency be in the center of the upper and lower limits. By having the center frequency skewed to one side, i.e., toward one of the limits, a heavy burden is placed on the receiver to demodulate or discriminate the lower limit.
Techniques that have been used to overcome this center frequency dilemma include the specification of data protocols, such as SDLC or Manchester encoding. These protocol restrictions require that the data signals transition in accordance with the rules of the protocol to, effectively, alter their duty cycle to approach the desired 50% level.
It is therefore desired to produce a frequency modulated transmitter that is protocol independent and is responsive to both DC and AC data signals. Further desired is a system that is low cost, requires no adjustment, has no harmonic or spurious output and is frequency agile over a wide frequency range such as 100 MHz.
It is the object of the present invention to provide a frequency modulated transmitter that is protocol independent, low cost, requiring few if any adjustments, produces extremely small harmonic or spurious outputs, is responsive to both DC and AC up to approximately 200 KHz and is agile over a frequency range of approximately 100 MHz.